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This ZX Spectrum apparently has 80K of RAM.
The image was posted on Twitter by Claire, ZX Claire, and I was intrigued as I hadn't come across the East London Robotics SP80 upgrade kit before.
The kit is to be used to upgrade a 16K ZX Spectrum to 80K, the base 16K, plus the normal expansion of 32K giving the 48K plus a second bank of 32K accessible via an OUT instruction to take it to 80K.
It looks a little bodged, but that was the product as supplied.
Issue one Spectrums had 16K on board, and two sockets at the back to fit a 32K RAM module, but by the time they got to issue two, the extra RAM had been integrated onto the mainboard.
You could still buy 16K versions, and later upgrade them to 48K, there were sockets where the eight RAM chips and four logic chips required for the upgrade could be installed. Later machines were supplied as 48K as standard and these parts were soldered directly to the board.
The logic chips between the ULA and the Z80 handle multiplexing the address bus for the RAM chips. IC3 and IC4 are for the lower 16K of RAM (present on all Spectrums) and the other four chips are for the initially optional extra 32K.
The RAM used was normally marked 4532, and was a little unusual in that they were 64K x 1 RAM chips that had faults, but at least half the chip was OK, so they were sold as 32K x1 RAM chips so only the good sides would be used. This is sometimes reported as a cost cutting measure, which it was, but also, 32K was all that was left in the address space after the 16K ROM and 16K RAM already present were used, so it was better than wasting 32K of good chips, or fitting 16 16K chips.
There were two types of 4532, one where the top half was good, and one the bottom half. This was selected by a jumper on the board, maked LK3 and LK4 on the schematic. You occasionally see a wire link from pin 10 of IC26 to it's ground pin or 5V pin so the user could install the chips without having to change the link.
I've redrawn the relevant section here, the 74LS157 mux chip is used to set the address to be accessed in two sections, a row and a column. That is how DRAM seems to like it, it keeps the pin count of the RAM chips down.
Here the first part of the address is made up of A8, A7, A14 and A9. RAM doesn't care what order the address lines are in. You read back from the same location you wrote to, so it's not important what order they are in. The second part is made up on A1, A0, A2 and where there forth address would be is either tied high or low, to access only the top or bottom half of RAM.
The upgrade kit was supplied with 4164 RAM chips, full 64Kx1. (pictures of the modified board kindly supplied by Claire). The kit adds some logic which forms a latch, so that the extra line on the mux chip is switched from high to low under software control, and indicates which bank is active with an LED which would shine out of the expansion port.
There is an extra logic chip (a 74LS02) sitting on top of the 74LS157 mux chip, soldered to some of it's pins, with wires going to the 74LS00 and 74LS32 chips that were all part of the upgrade.
Some of the pins of the 74LS00 are bent up. Originally, only two gates were used, so the spare gates are used as part of the logic.
I reverse engineered what was going on from the Spectrum issue 2 schematic and the photos. There's a little bit of guess work going on here as I think there are some links under the chips and the connections between the 02 and the 157 underneath are unclear as one is 14 pins and the other 16 pins, so it's sitting between the pins.
I've redrawn it for clarity, this is what I think is going on. The circuit does indeed drive the extra input to the 157 mux, with the state being shown by the LED. Starting on the left, if A7 is low and /RD is low, then there is a write operation where bit 7 of the address is low, and the output of IC26U.2 is high (that is the 02 which is above IC26). Next if MREQ is high, then it is not a memory request, so it must be an IO operation. If those two are high, the output of the gate goes low. That signal is used as the trigger for the rest of the circuit, it only goes low when there is an IO write operation with bit 7 low.
Anyone still following? That signal going low causes the output of IC24.4 to go low irrespective of the state of the signal driving the LED. This then feeds one input to a flip flop made up of IC26U.1 and IC26U.4. The output of IC26U.1 then goes low and the LED turns on. That then feeds IC26U.3, if A14 is high, that won't make any difference, and the state will be latched with the output low and the LED on. However, if A14 is low when this happens, then the other half of the flip flop is triggered and the output is latched high and the LED goes off. I think the 3K9 resistor delays things slightly to make sure the sequence is followed.
This tallies with the manual, to activate 'page 2', type OUT 65407,0. 65407 is FF7F in hex, or 1111 1111 0111 111 in binary, so you can see bit 7 is low. (the ,0 is irrelevant as the databus is not connected so you could use any value). To switch back to 'page 1', type OUT 49023,0. That is BF7F, or 1011 1111 0111 1111, bits 14 and 7 low.
That's it for the moment, I think the reverse engineered schematic is correct. I need to dig out a suitable machine to try this out on. It is an entirely reversible mod, as all the wiring is between the chips in the sockets that would have been part of the kit. I would also be interested to find any software which can make use of the extra RAM, otherwise it's interesting but essentially pointless. I don't think this was around long enough to gain traction, and as soon as Sinclair started shipping boards with 48K as standard and no sockets, this was no longer an option and so this didn't gain the ground it may have done if it had been available for later machines.
Stop Press:
Claire has found another one, this time buried inside a DK Tronics case, along with a whole lot of other stuff!
This one looks like it has a switch to disable the mod (maybe it caused some issues with software inadvertently writing to an IO address with bit 7 low?). It's not clear how that is connected as it is covered with tape, but my guess would be pulling the end of the 3K9 resistor to ground to stop that half of the flip flop from being activated.
